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voltage regulators 1 AN8049SH 1.8-volt 3-channel step-up, step-down, and polarity inverting dc-dc converter control ic n overview the AN8049SH is a three-channel pwm dc-dc converter control ic that features low-voltage operation. this ic can form a power supply that provides two step- up outputs and one step-down or polarity inverted output with a minimal number of external components. the AN8049SH features the ability to operate from a supply voltage as low as 1.8 v, and thus can be operated from two dry-batteries. n features wide operating supply voltage range: 1.8 v to 14 v high-precision reference voltage circuit v ref pin voltage: 1% error amplifier: 1.5% surface mounting package for miniaturized and thinner power supplies package: ssop-24d 0.5-mm lead pitch 7.8 mm 6.8 mm t 1.9 mm supports control over a wide output frequency range: 20 khz to 1 mhz on/off (sequence control) pins provided for each channel for easy sequence control setup the negative supply error amplifier supports 0-volt input. common-mode input voltage range: - 0.1 v to v cc - 1.4 v this allows the number of external components to be reduced by two resistors. fixed duty factor: 86% however, the duty can be adjusted to anywhere from 0% to 100% with an external resistor. timer latch short-circuit protection circuit (charge current: 1.1 m a typical) low input voltage malfunction prevention circuit (u.v.l.o.) (operation start voltage: 1.67 v typical) standby function (active-high control input, standby mode current: 1 m a maximum) alternate package versions also available. part no.: an8049fhn package: qfn-24 0.5-mm lead pitch 5.4 mm 4.4 mm t 0.8 mm n applications electronic equipment that requires a power supply system ssop024-p-0300a unit : mm 6.50.3 112 24 13 5.50.3 7.50.3 0.50 (0.50) seating plane seating plane 0.20.1 0.650.10 0.650.10 1.50.2 0.10.1 (0.50) 0 to 10 0.15 +0.10 C 0.05
AN8049SH voltage regulators 2 n block diagram in-1 23 fb1 24 ctl1 7 v cc 16 dt1 4 v ref 9 osc 17 off 8 20 k w 1.1 m a 1.26 v ctl3 dt3 in - 3 19 in + 3 fb3 20 s.c.p. rb1 out1 out3 rb2 out2 gnd 1 18 5 2 in - 2 21 fb2 22 1.26 v error amplifier 3 ctl2 dt2 6 3 1.26 v 1.26 v 1.1 m a 1.1 m a 1.1 m a 0.9 v error amplifier 1 error amplifier 2 44 k w 56 k w v ref v cc 45 k w 55 k w v cc on/off control reference voltage supply v ref sawtooth wave generator 0.7 v 0.3 v 1.26 v (allowance: 1%) s.c.p. comp. latch u.v.l.o. r s q 1.26 v 1.26 v 20 k w 20 k w pwm2 pwm3 pwm1 v ref 45 k w 27 k w 27 k w 55 k w 11 12 v cc 13 10 15 14 n pin descriptions pin no. symbol description 12 out1 out1 block push-pull output 13 out2 out2 block push-pull output 14 gnd ground 15 out3 out3 block open-collector output 16 v cc supply voltage 17 osc oscillator circuit timing resistor and capacitor connection 18 in + 3 error amplifier 3 noninverting input 19 in - 3 error amplifier 3 inverting input 20 fb3 error amplifier 3 output 21 in - 2 error amplifier 2 inverting input 22 fb2 error amplifier 2 output 23 in - 1 error amplifier 1 inverting input 24 fb1 error amplifier 1 output pin no. symbol description 1 s.c.p. c onnection for the capacitor that provides the short- circuit protection circuit time constant 2 dt3 channel 3 soft start setting 3 dt2 channel 2 soft start setting 4 dt1 channel 1 soft start setting 5 ctl3 channel 3 on/off control 6 ctl2 channel 2 on/off control 7 ctl1 channel 1 on/off control 8 off on/off control 9v ref reference voltage output 10 rb2 connection for the out2 block output source current setting resistor 11 rb1 connection for the out1 block output source current setting resistor
voltage regulators AN8049SH 3 note) 1. do not apply external currents or voltages to any pins not specifically mentioned. for circuit currents, ' + ' denotes current flowing into the ic, and ' - ' denotes current flowing out of the ic. 2. items other than the storage temperature, operating temperature, and power dissipation are all stipulated for an ambient temperature t a = 25 c. 3. * 1: t a = 85c. see the "application notes" for details on the relationship between ic power dissipation and the ambient temperature. * 2: when v cc < 6 v, the following condition must hold: v in - 1 = v in - 2 = v cc - 0.2 v. n absolute maximum ratings parameter symbol rating unit supply voltage v cc 14.2 v off pin allowable application v off 14.2 v voltage ctl pin allowable application v ctl v cc - 0.2 v voltage error amplifier input pin v in 6v allowable application voltage * 2 supply current i cc ? ma out1 and out2 pin output i so(out) - 50 ma source current out3 pin output current i o + 50 ma power dissipation * 1 p d 146 mw operating temperature t opr - 30 to + 85 c storage temperature t stg - 55 to + 125 c n recommended operating range parameter symbol range unit off pin application voltage v off 0 to 14 v out1 and out2 pin output source current i so(out) - 40 to - 1ma out3 pin output current i o 40 (max.) timing resistance r t 3 to 33 k w timing capacitance c t 100 to 10 000 pf oscillator frequency f out 20 to 1 000 khz short-circuit protection time-constant setting capacitance c scp 1 000 (min.) pf output current setting resistance r b 750 to 15 000 w
AN8049SH voltage regulators 4 parameter symbol conditions min typ max unit reference voltage block reference voltage v ref i ref = - 0.1 ma 1.247 1.26 1.273 v line regulation with input fluctuation line v cc = 1.8 v to 14 v ? 220mv load regulation load i ref = - 0.1 ma to - 1 ma - 20 - 3 ? mv u.v.l.o. block circuit operation start voltage v uon 1.59 1.67 1.75 v error amplifier 1 block input threshold voltage 1 v th1 1.241 1.26 1.279 v input bias current 1 i b1 ? 0.1 0.2 m a high-level output voltage 1 v eh1 1.0 1.2 1.4 v low-level output voltage 1 v el1 ?? 0.2 v output source current 1 i so(fb)1 - 38 - 31 - 24 m a output sink current 1 i si(fb)1 0.5 ?? ma error amplifier 2 block input threshold voltage 2 v th2 1.241 1.26 1.279 v input bias current 2 i b2 ? 0.1 0.2 m a high-level output voltage 2 v eh2 1.0 1.2 1.4 v low-level output voltage 2 v el2 ?? 0.2 v output source current 2 i so(fb)2 - 38 - 31 - 24 m a output sink current 2 i si(fb)2 0.5 ?? ma error amplifier 3 block input offset voltage v io - 6 ? 6mv common-mode input voltage range v icr - 0.1 ? v cc v - 1.4 input bias current 3 i b3 - 0.6 - 0.3 ?m a high-level output voltage 3 v eh3 1.0 1.2 1.4 v low-level output voltage 3 v el3 ?? 0.2 v output source current 3 i so(fb)3 - 38 - 31 - 24 m a output sink current 3 i si(fb)3 0.5 ?? ma oscillator block oscillator frequency f out r t = 7.5 k w , c t = 680 pf 170 190 210 khz n electrical characteristics at v cc = 2.4 v, c ref = 0.1 m f, t a = 25 c
voltage regulators AN8049SH 5 parameter symbol conditions min typ max unit output 1 block output duty factor 1 du 1 r t = 7.5 k w , c t = 680 pf 80 86 92 % high-level output voltage 1 v oh1 i o = - 10 ma, r b = 1 k w v cc - 1 ?? v low-level output voltage 1 v ol1 i o = 10 ma, r b = 1 k w?? 0.2 v output source current 1 i so(out)1 v o = 0.7 v, r b = 1 k w- 34 - 29 - 24 ma output sink current 3 i si(out)1 v o = 0.7 v, r b = 1 k w 40 ?? ma pull-down resistor 1 r o1 17 27 37 k w output 2 block output duty factor 2 du 2 r t = 7.5 k w , c t = 680 pf 80 86 92 % high-level output voltage 2 v oh2 i o = - 10 ma, r b = 1 k w v cc - 1 ?? v low-level output voltage 2 v ol2 i o = 10 ma, r b = 1 k w?? 0.2 v output source current 2 i so(out)2 v o = 0.7 v, r b = 1 k w- 34 - 29 - 24 ma output sink current 2 i si(out)2 v o = 0.7 v, r b = 1 k w 40 ?? ma pull-down resistor 2 r o2 17 27 37 k w output 3 block output duty factor 3 du 3 r t = 7.5 k w , c t = 680 pf 80 86 92 % output saturation voltage v o(sat) i o = 40 ma ?? 0.5 v output leakage current i ole v13 = 14 v ?? 1 m a short-circuit protection circuit block input standby voltage v stby ?? 0.1 v input threshold voltage v thpc 0.8 0.9 1.0 v input latch voltage v in ?? 0.1 v charge current i chg v scp = 0 v - 1.43 - 1.1 - 0.77 m a on/off control block input threshold voltage v on(th) 0.6 0.9 1.2 v ctl block input threshold voltage v thctl 1.07 1.26 1.45 v charge current i ctl v ctl = 0 v - 1.43 - 1.1 - 0.77 m a whole device average consumption current i cc(off) r b = 9.1 k w , duty = 50% ? 4.2 5.5 ma standby mode current i cc(sb) ?? 1 m a n electrical characteristics at v cc = 2.4 v, c ref = 0.1 m f, t a = 25 c (continued)
AN8049SH voltage regulators 6 parameter symbol conditions min typ max unit reference voltage block v ref temperature characteristics v rfedt t a = - 30 c to + 85 c ? 1 ? % error amplifier 1 block v th temperature characteristics v thdt1 t a = - 30 c to + 85 c ? 1.5 ? % open loop gain 1 a v1 ? 80 ? db error amplifier 2 block v th temperature variation v thdt2 ? 1.5 ? % open loop gain 2 a v2 ? 80 ? db error amplifier 3 block open loop gain 3 a v3 ? 80 ? db oscillator block frequency supply voltage f dv v cc = 1.8 v to 14 v ? 1 ? % characteristics r t = 7.5 k w , c t = 680 pf frequency temperature f dt t a = - 30 c to + 85 c ? 3 ?% characteristics r t = 7.5 k w , c t = 680 pf short-circuit protection circuit block comparator threshold voltage v thl ? 1.26 ? v on/off control block off pin current i off v off = 5 v ? 38 ?m a n electrical characteristics at t a = 25 c (continued) design reference data note: the characteristics listed below are reference values related to the ic design and are not guaranteed.
voltage regulators AN8049SH 7 pin no. equivalent circuit description i/o 1 s.c.p.: o connection for the capacitor that sets the timer latch short-circuit protection circuit time constant. use a capacitor with a value of 1 000 pf or higher. the charge current i chg is 1.1 m a typical. 2 dt3: i sets the channel 3 soft start time. set the time by connecting a capacitor between this pin and ground. (see the "application notes, [7]" section.) note that although the channel 3 maximum on duty is set internally to 86%, the maximum on duty can be adjusted by connecting resistors between this pin and ground, and between this pin and the v ref pin. (see the "application notes, [6]" section.) 3 dt2: i sets the channel 2 soft start time. set the time by connecting a capacitor between this pin and ground. (see the "application notes, [7]" section.) note that although the channel 2 maximum on duty is set internally to 86%, the maximum on duty can be adjusted by connecting resistors between this pin and ground, and between this pin and the v ref pin. (see the "application notes, [6]" section.) 4 dt1: i sets the channel 1 soft start time. set the time by connecting a capacitor between this pin and ground. (see the "application notes, [7]" section.) note that although the channel 1 maximum on duty is set internally to 86%, the maximum on duty can be adjusted by connecting resistors between this pin and ground, and between this pin and the v ref pin. (see the "application notes, [6]" section.) n terminal equivalent circuits 1.26 v v cc latch s r q 1.1 m a 1.5 k w output shutoff 1 46 k w 44 k w pwm3 2 9 20 17 55 k w 45 k w pwm2 3 9 22 17 55 k w 45 k w pwm1 4 9 24 17
AN8049SH voltage regulators 8 pin no. equivalent circuit description i/o 5 ctl3: i controls the on/off state of channel 3. a delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. (see the "application notes, [9]" section.) t dly3 = 1.26 (v) c ctl3 ( m f)/1.1 ( m a) (s) this pin can also be used to control the on/off state with an external signal. in that case, the allowable input voltage range is from 0 v to v cc . note that during u.v.l.o. and timer latch operation, this pin is connected to ground through a 20 k w resistor. 6 ctl2: i controls the on/off state of channel 2. a delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. (see the "application notes, [9]" section.) t dly2 = 1.26 (v) c ctl2 ( m f)/1.1 (m a) (s) this pin can also be used to control the on/off state with an external signal. in that case, the allowable input voltage range is from 0 v to v cc . note that during u.v.l.o. and timer latch operation, this pin is connected to ground through a 20 k w resistor. 7 ctl1: i controls the on/off state of channel 1. a delay can be provided in the power supply turn-on start time by connecting a capacitor between this pin and ground. (see the "application notes, [9]" section.) t dly1 = 1.26 (v) c ctl1 ( m f)/1.1 (m a) (s) this pin can also be used to control the on/off state with an external signal. in that case, the allowable input voltage range is from 0 v to v cc . note that during u.v.l.o. and timer latch operation, this pin is connected to ground through a 20 k w resistor. n terminal equivalent circuits (continued) 1.26 v v cc 20 k w 1.1 m a high channel 3 output operation 5 1.26 v v cc 20 k w 1.1 m a high channel 2 output operation 6 1.26 v v cc 20 k w 1.1 m a high channel 1 output operation 7
voltage regulators AN8049SH 9 pin no. equivalent circuit description i/o 8 off: i controls the on/off state. when the input is high: normal operation (v off > 1.2 v) when the input is low: standby mode (v off < 0.6 v) in standby mode, the total current consumption is held to under 1 m a. 9v ref :o outputs the internal reference voltage. the reference voltage is 1.26 v (allowance: 1%) when v cc is 2.4 v and i ref is - 0.1 ma. insert a capacitor of at least 0.1 m f between v ref and ground for phase compensation. 10 rb2: i connection for a resistor that sets the channel 2 output current. use a resistor in the range 750 w to 15 k w . 11 rb1: i connection for a resistor that sets the channel 1 output current. use a resistor in the range 750 w to 15 k w . 12 see pin 11. out1: o push-pull output. the absolute maximum rating for the output source current is - 50 ma. the output source current is set by the external resistor connected to the rb1 pin. n terminal equivalent circuits (continued) 100 k w start and stop of internal circuits. 8 v cc 9 200 w 30 k w 10 16 13 i si(out)2 i so(out)2 200 w 30 k w 11 16 12 i si(out)1 i so(out)1
AN8049SH voltage regulators 10 pin no. equivalent circuit description i/o 13 see pin 10. out2: o push-pull output. the absolute maximum rating for the output source current is - 50 ma. the output source current is set by the external resistor connected to the rb2 pin. 14 gnd: ? ground 15 out3: o open-collector output. the absolute maximum rating for the output current is + 50 ma. 16 v cc : ? power supply. provide the oprating supply voltage in the range 1.8 v to 14 v. 17 osc: o connection for the capacitor and resistor that determine the oscillator frequency. use a capacitor in the range 100 pf to 1 000 pf and a resistor in the range 3 k w to 33 k w . use an oscillator frequency in the range 20 khz to 1 mhz. 18 in + 3: i noninverting input to the error amplifier 3. 19 in - 3: i inverting input to the error amplifier 3. 20 fb3: o output from the error amplifier 3. this circuit can provide a source current of - 31 m a or a sink current of 0.5 ma (minimum). n terminal equivalent circuits (continued) 14 15 16 16 0.2 v v cc latch s r q 17 100 w 100 w 18 19 16 31 m a 0.5 ma osc pwm3 9 18 19 20
voltage regulators AN8049SH 11 pin no. equivalent circuit description i/o 21 in - 2: i inverting input to the error amplifier 2. 22 fb2: o output from the error amplifier 2. this circuit can provide a source current of - 31 m a or a sink current of 0.5 ma (minimum). 23 in - 1: i inverting input to the error amplifier 1. 24 fb1: o output from the error amplifier 1. this circuit can provide a source current of - 31 m a or a sink current of 0.5 ma (minimum). n terminal equivalent circuits (continued) 1.26 v 1.5 k w 21 16 31 m a 0.5 ma min. 1.19 v osc pwm2 22 21 16 1.26 v 1.5 k w 16 23 31 m a 1.19 v osc pwm1 23 24 16 0.5 ma min.
AN8049SH voltage regulators 12 n usage notes [1] allowable power dissipation 1. since the power dissipation (p) in this ic increases proportionally with the supply voltage, applications must be careful to operate so that the loss does not exceed the allowable power dissipation, p d , for the package. see the p d ? t a curve. reference formula: p = (v cc - v beq1 ) i so(out)1 du 1 + (v cc - v beq2 ) i so(out)2 du 2 + v o(sat)3 i out3 du 3 + v cc i cc < p d v beq1 : the voltage between the base and emitter of the channel 1 npn transistor i so(out)1 : the out1 pin output source current (this is set by the resistor connected to the rb1 pin. when r b is 1 k w , i so(out)1 will be 34 ma, maximum.) du 1 : the output 1 on-duty v beq2 : the voltage between the base and emitter of the channel 2 npn transistor i so(out)2 : the out2 pin output source current (this is set by the resistor connected to the rb2 pin. when r b is 1 k w , i so(out)2 will be 34 ma, maximum.) du 2 : the output 2 on-duty v o(sat)3 : the out3 pin saturation voltage (0.5 v maximum when i out3 is 40 ma.) i out3 : the out3 pin current (this will be {v cc - v beq3 - v o(sat)3 }/r o3 .) du 3 : the output 3 on-duty i cc : the v cc pin current 2. if the ic is shorted to ground, shorted to v cc , or inserted incorrectly, either the device itself or peripheral components will be destroyed. [2] allowable v cc ripple v cc ripple due to the switching transistor being turned on and off can cause this ic's u.v.l.o. circuit, which is biased by v cc , to operate incorrectly, and can cause the s.c.p. capacitor charging operation to fail to start when the output is shorted. the figure shows the allowable range for v cc ripple. applications should reduce v cc ripple either by inserting a ripple filter in the v cc line or by inserting a capacitor between the ic gnd and v cc pins and locating that capacitor as close to the ic as possible. note that the allowable range shown here is the result of testing the ic independently, and that the allowable range may differ depending on the actual system of the power supply circuit. also note that this allowable range is a design target, and is not guaranteed by testing of all samples. allowable v cc ripple ripple frequency (hz) 10 m 1 m 100 k 10 k v cc ripple voltage v cc (ac) (v[p-p]) 012345678 allowable range when v cc is 3 v. allowable range when v cc is 10 v.
voltage regulators AN8049SH 13 n application notes [1] ssop024-p-0300a package power dissipation p d ? t a n usage notes (continued) [3] notes on mos drive since the AN8049SH channel 1 and 2 output circuits were designed to drive bipolar transistors, the following points require care if this device is used to drive n-channel mos transistors directly. 1. use an n-channel mos transistor with a low input ca- pacitance. the AN8049SH is designed to drive bipolar transis- tors, and adopts a circuit structure that can provide a con- stant-current (50 ma maximum) output source current. furthermore, it has a sink current capacity of 80 ma maxi- mum. this means that designs must be concerned about increased loss due to longer rise- and fall-times. if a prob- lem occurs, an inverter may be inserted as shown in figure 1 to provide amplification. 2. use an n-channel mos transistor with a low gate-thresh- old voltage. since the AN8049SH out1 and out2 pin high-level output voltage is v cc - 1.0 v (minimum), low v t mos transistors with an adequately low on-resistance must be used. also, if a large v gs is required, one solution is to use a transformer as shown in figure 2, and apply a voltage that is twice the input voltage to the ic's v cc pin. v in v out out1/2 figure 1. output boosting circuit figure 2. gate drive voltage boosting technique v in v cc v out out1/2 v cc ? 2 v in - vd power dissipation p d (mw) ambient temperature t a ( c) 0 0 25 50 75 85 100 125 700 600 658 500 400 300 366 200 263 100 146 glass epoxy printed circuit board (75 75 t 1.6 mm 3 ) r th(j - a) = 152 c/w p d = 658 mw(25 c) independent ic without a heat sink r th(j - a) = 273 c/w p d = 366 mw(25 c)
AN8049SH voltage regulators 14 f osc ? maximum output duty (r t = 3 k w ) f osc ? maximum output duty (r t = 33 k w ) 95 90 85 80 75 1m 100k 10k f osc (hz) du 1 , du 2 , du 3 (%) du 1 , du 2 du 3 n application notes (continued) [2] main characteristics timing capacitance ? oscillator frequency dt1 and dt2 pin voltage ? maximum on-duty dt3 pin voltage ? maximum on-duty 10k 1m 10p 1n 10n c t (f) f out (hz) 100k r t = 3 k w r t = 33 k w r t = 7.5 k w 0 10 20 30 40 50 60 70 80 90 100 0.2 0.3 0.4 0.5 0.6 0.7 0.8 v dt (v) du (%) f = 190 khz f = 1 mhz 0 10 20 30 40 50 60 70 80 90 100 0.2 0.3 0.4 0.5 0.6 0.7 0.8 v dt3 (v) du 3 (%) f = 190 khz f = 1 mhz f osc ? maximum output duty (r t = 7.5 k w ) 95 90 85 80 75 1m 100k 10k f osc (hz) du 1 , du 2 , du 3 (%) du 1 , du 2 du 3 95 90 85 80 75 1m 100k 10k f osc (hz) du 1 , du 2 , du 3 (%) du 3 du 1 du 2
voltage regulators AN8049SH 15 n application notes (continued) [2] main characteristics (continued) r b ? i so(out) r b ? i si(out) 0 - 10 -2 0 -3 0 -4 0 -5 0 -6 0 -7 0 - 80 100k 10k 1k 100 r b ( w ) i so(out) (ma) v cc = 1.8 v 2.4 v 14 v 8 v 100 90 80 70 60 50 40 30 20 10 0 100k 10k 1k 100 r b ( w ) i si(out) (ma) 1.8 v, 2.4 v 8 v v cc = 14 v
AN8049SH voltage regulators 16 n application notes (continued) [3] timing charts output short 1.26 v v cc 0 v osc fb osc dt 1.67 v 1.26 v v cc pin voltage waveform s.c.p. pin voltage waveform ctl pin voltage waveform out1/2 pin voltage waveform totem pole circuit output out3 pin voltage waveform open-collector output
voltage regulators AN8049SH 17 n application notes (continued) [4] function descriptions 1. reference voltage block this circuit is composed of a band gap circuit, and outputs a 1.26 v (typical) reference voltage that is temperature compensated to a precision of 1%. this reference voltage is stabilized when the supply voltage is 1.8 v or higher. this reference voltage is used by error amplifiers 1 and 2. 2. triangular wave generator this circuit generates a triangular wave like a sawtooth with a peak of 0.7 v and a trough of 0.2 v using a capacitor c t (for the time constant) and resistor r t connected to the osc1 pin (pin 17). the oscillator frequency can be set to an arbitrary value by selecting appropriate values for the external ca- pacitor c t and resistor r t . this ic can use an oscillator frequency in the range 20 khz to 1 mhz. the triangular wave signal is provided to the noninverting input of the pwm comparator in each channel internally to the ic. use the formulas be- low for rough calculation of the oscillator fre- quency. note, however, that the above formulas do not take the rapid charge time, overshoot, and undershoot into account. see the experimentally determined graph of the oscillator frequency vs. timing capacitance value pro- vided in the main characteristics section. 3. error amplifier 1 this circuit is an npn-transistor input error amplifier that detects and amplifies the dc-dc converter output voltage, and inputs that signal to a pwm comparator. the 1.26 v internal reference voltage is applied to the noninverting input. arbi- trary gain and phase compensation can be set up by inserting a resistor and capacitor in series be- tween the fb1 pin (pin 24) and the in - 1 pin (pin 23). the output voltage v out1 can be set using the circuit shown in the figure. f osc ? - 1 ? 0.8 1 (hz) c t r t ln v oscl c t r t v osch figure 1. triangular oscillator waveform figure 2. connection method of error amplifier 1 (step-up output) t 2 t 1 t v osch ? 0.7 v v oscl ? 0.2 v discharge rapid charge 23 24 1.26 v in - 1 to the pwm comparator input r2 r1 fb1 v out1 error amplifier1 v out1 = 1.26 r 1 + r 2 r 2
AN8049SH voltage regulators 18 n application notes (continued) [4] function descriptions (continued) 4. error amplifier 2 this circuit is an npn-transistor input error amplifier that detects and amplifies the dc-dc converter output voltage and inputs that signal to a pwm comparator. the 1.26 v internal reference voltage is applied to the noninverting input. arbi- trary gain and phase compensation can be set up by inserting a resistor and capacitor in series be- tween the fb2 pin (pin 22) and the in - 2 pin (pin 21). the output voltage v out2 can be set using the circuit shown in the figure. 5. error amplifier 3 this circuit is an pnp-transistor input error amplifier that detects and amplifies the dc-dc converter output voltage and inputs that signal to a pwm comparator. arbitrary gain and phase compensation can be set up by inserting a resistor and capacitor in series between the fb3 pin (pin 20) and the in - 3 pin (pin 19). the output voltage v out3 can be set using the circuit shown in the figure. step-down output inverting output figure 4. connection method of error amplifier 3 6. timer latch short-circuit protection circuit this circuit protects the external main switching elements, flywheel diodes, choke coils, and other components against degradation or destruction if an excessive load or a short circuit of the power supply output continues for longer than a certain fixed period. the timer latch short-circuit protection circuit detects the output of the error amplifiers. if the dc-dc converter output voltage drops and an fb pin (pins 20, 22, or 24) voltage exceeds 0.9 v, the s.c.p. comparator outputs a low level and the timer circuit starts. this starts charging the external protection circuit delay time capacitor. if the error amplifier output does not return to the normal voltage range before that capacitor reaches 1.26 v, the latch circuit latches, the output drive transistors are turned off, and the dead-time is set to 100%. (see the "[5] time constant setup for the timer latch short-circuit protection circuit" section later in this document.) 21 22 1.26 v in - 2 to the pwm comparator input r2 r1 fb2 v out2 error amplifier2 v out2 = 1.26 r 1 + r 2 r 2 in - 3 in + 3 to the pwm comparator input r4 r3 r2 r1 fb3 v out3 v ref error amplifier3 v out3 = r 1 + r 2 r 3 + r 4 v ref r 4 r 2 18 20 19 in - 3 in + 3 to the pwm comparator input r2 r1 fb3 v ref v out3 error amplifier3 v out3 = - v ref r 2 r 1 18 20 19 figure 3. connection method of error amplifier 2 (step-up output)
voltage regulators AN8049SH 19 n application notes (continued) [4] function descriptions (continued) 7. low input voltage malfunction prevention circuit (u.v.l.o.) this circuit protects the system against degradation or destruction due to incorrect control operation when the power supply voltage falls during power on or power off. the low input voltage malfunction prevention circuit detects the internal reference voltage that changes with the supply voltage level. while the supply voltage is rising, this circuit cuts off the output drive transistor until the reference voltage reaches 1.67 v. it also sets the dead-time to 100 % and at the same time holds the s.c.p. pin (pin 1) and the dt pins (pins 2, 3, and 4) at 0 v, and the osc pin (pin 17) at about 1.2 v. 8. pwm comparators the pwm comparators control the on-period of the output pulse according to their input voltage. the pwm 1 and pwm 2 comparators reverse the logic of their inputs when adjusting the on-period of their respective output. the output transistors are turned on during periods when the osc pin (pin 17) triangular waveform is lower than both of the corresponding fb pin (pins 20, 22, or 24) and the corresponding dt pin (pins 2, 3, or 4). the maximum duty is set to 86 % internally, but can be set to a value in the range 0% to 100% by inserting a resistor between the dt pin and ground, or the dt pin and v ref pin. (see the "[6] setting the maximum duty" section later in this document.) the ic's soft start function operates to gradually increase the width of the output pulse on-period during startup if a capacitor is inserted between the dt pin and ground. see the "[7] setting the soft start time" section later in this document. 9. output 1 and output 2 blocks these output circuits have a totem pole structure. a constant-current source output with good line regulation can be set up freely by connecting current setting resistors to the rb pins (pins 10 and 11). see the "[2] main characteristics" section earlier in this document for details on the r b vs. i so(out) and r b vs. i si(out) characteristics. 10. output 3 block this output circuit has an open collector structure. an output current of up to 50 ma can be provided, and the output pin has a breakdown voltage of 14.2 v. 11. ctl block this block controls the on/off state of each channel. see the "[9] sequential operation" section later in this document.
AN8049SH voltage regulators 20 n application notes (continued) [5] time constant setup for the timer latch short-circuit protection circuit figure 6 shows the structure of the timer latch short-circuit protection circuit. the short-circuit protection comparator continuously compares a 0.9 v reference voltage with the fb1, fb2, and fb3 error amplifier outputs. when the dc-dc converter output load conditions are stable, the short-circuit protection comparator holds its average value since there are no fluctuations in the error amplifier outputs. at this time, the output transistor q1 will be in the conducting state, and the s.c.p. pin will be held at 0 v. if the output load conditions change rapidly and a high-level signal (0.9 v or higher) is input to the short-circuit protection comparator from the error amplifier output, the short-circuit protection comparator will output a low level and the output transistor q1 will shut off. then, the capacitor c scp connected to the s.c.p. pin will start to charge. when the external capacitor c scp is charged to about 1.26 v by the constant current of about 1.1 ma, the latch circuit will latch and the dead-time will be set to 100% with the output held fixed at the low level. once the latch circuit has latched, the s.c.p. pin capacitor will be discharged to about 0 v, but the latch circuit will not reset unless either power is turned off or the power supply is re-started by on/off control. 1.26 v = i chg t pe c scp \ t pe (s) = 1.15 c scp ( m f) at power supply startup, the output appears to be in the shorted state, and the ic starts to charge the s.c.p. pin capacitor. therefore, users must select an external capacitor that allows the dc-dc converter output voltage to rise before the latch circuit in the later stage latches. in particular, care is required if the soft start function is used, since that function makes the startup time longer. figure 5. s.c.p. pin charging waveform figure 6. short-circuit protection circuit short-circuit detection time t pe t (s) 0.06 1.26 v scp (v) fb2 fb3 fb1 0.9 v s.c.p. comp. s.c.p. high level detection comparator internal reference voltage u.v.l.o v cc q1 on/off control 1.1 m a r s q latch v ref output shutoff 24 20 22 1
voltage regulators AN8049SH 21 n application notes (continued) [6] setting the maximum duty the maximum duty is set to 86% internally to the ic. however, this setting can be changed to be any value in the range 0% to 100% by adding an external resistor. 1. to use a duty lower than the current duty (80% to 92%) insert the resistor r dt between the dt pin and ground. determine the dt pin voltage for the required duty from the provided dt pin voltage vs. maximum on-duty characteristics in the "[2] main characteristics" section and determine the value of the external resistor r dt from formula a. note that there is a sample-to-sample variation of - 19% to + 33% due to temperature characteristics and sample- to-sample variations of the internal resistors r1 and r2. (however, the direction of the sample-to-sample varia- tions is identical for r1 and r2.) determine the size of the sample-to-sample variations in the dt pin voltage v dt from formula b, and estimate the size of the sample-to-sample variation in the duty from the provided dt pin voltage vs. maximum on-duty characteristics in the "[2] main characteristics" section . a v dt = r 2 /r dt v ref b r 1 + r 2 /r dt ch.1, 2 ch.3 r1 45 k w 44 k w r2 55 k w 56 k w 2. to use a duty higher than the current duty (80% to 92%) insert the resistor r dt between the dt pin and the v ref pin. use formulas c and d to determine the value of the external resistor r dt and the size of the sample-to-sample variations in the same manner as in item 1 above. c v dt = r 2 v ref d r 2 + r 1 /r dt r dt = v dt v ref - ( 1 + 1 ) v dt r 1 r 1 r 2 r dt = v ref - v dt ( 1 + 1 ) v dt - v ref r 1 r 2 r 1 r1 r2 v ref 1.26 v dt r dt r1 r2 v ref 1.26 v dt r dt
AN8049SH voltage regulators 22 n application notes (continued) [7] setting the soft start time the soft start time is determined by the value of the capacitor connected between the dt pin and ground. use the following formula to set the soft start time t d . t d = - r 2 c dt ln (1 - v dt r 1 ) v ref - v dt r 2 ch.1, 2 ch.3 r1 45 k w 44 k w r2 55 k w 56 k w osc pin waveform dt pin waveform v dt 0.2 v soft start time, t d r1 r2 v ref 1.26 v dt c dt
voltage regulators AN8049SH 23 n application notes (continued) [8] parallel synchronous operation of multiple ics multiple instances of this ic can be operated in parallel. if the osc pins (pin 17) and off pins (pin 8) are connected to each other as shown in figure 7, the ics will operate at the same frequency. it is also possible to operate a one-channel control ic (e.g. the an8016sh or an8016nsh) and a two-channel control ic (e.g. the an8017sa or an8018sa) in this parallel synchronous mode. in this case, short the osc and off pins together. figure 7. synchronous parallel operation 9 8 1 17 s.c.p. off osc osc v ref 9 8 1 17 s.c.p. off v ref off pins connected together osc pins connected together h l AN8049SH AN8049SH ic1 ic2 notes on parallel operation: 1. the remote on/off state of each individual ic cannot be controlled independently. in this sort of circuit, always connect all the off pins together, and control the on/off states of the multiple ics at the same time. the reason for this is that if, for example, ic1 is solely turned on/off, the sawtooth wave will be stopped temporarily and the osc pin held fixed at about 1.2 v. as a result the ic2 out1 to out3 pins will be forced temporarily to the full off-state and the dc-dc converter output voltage will fall. 2. all ics are shut down when an output shorted state occurs. for example, if the ic1 output voltage falls, its output short-circuit protection circuit will operate, and the latch circuit will latch. when this happens, the ic1 output stops, and at the same time the sawtooth oscillator stops, and the osc pin is held fixed at about 1.2 v. as a result, the ic2 out1 to out3 pins temporarily go to the full off-state, and the dc-dc converter output voltage will drop. finally, the ic2 output short-circuit protection circuit will operate, and the latch will go to the latched state. this behavior will also occur if the ic2 output falls first.
AN8049SH voltage regulators 24 n application notes (continued) [9] sequential operation sequential operation under the control of external capacitors delays can be provided in the startup times by inserting capacitors (c ctl ) between the ctl pins and ground. delay time: t dly = 1.26 (v) c ctl ( m f)/1.1 ( m a) (s) figure 8. sequential operation using external capacitors 5 c ctl3 c ctl2 c ctl1 ctl3 ctl2 ctl1 6 7 AN8049SH c ctl1 < c ctl2 < c ctl3 u.v.l.o. cleared 1.26 v ch.1 ch.2 ch.3 ctl1 ctl2 ctl3 v ctl ? v cc stop start stop start stop start
voltage regulators AN8049SH 25 n application notes (continued) [10] notes on power supply printed circuit board design careful attention must be paid to the following points when designing the printed circuit board layout to achieve low noise and high efficiency. 1. use extremely wide lines for the ground lines, and isolate the ic ground from the power system ground. in particular, during light-load operation (when the on-duty is low) switching noise can enter the system at the lower limit of the sawtooth waveform causing the operating frequency to vary every period and resulting in unstable control. take measures described as 1) and 2) below, and assure that switching noise does not appear on the sawtooth waveform. 1) use a ground line separate from the power system ground for the capacitor and resistor connected to the osc pin. 2) lower the osc pin impedance by either decreasing the value of the resistor r t or increasing the value of the capacitor c t . (see the figures below.) 2. position input filter capacitors as close as possible to the v cc and ground pins. if switching noise cannot be suppressed even with exceptionally large capacitors, or if there are limitations on the size of capacitors that can be used, install an cr filter in the input to reduce switching noise. problems may occur if switching noise enters the ic by any route. 3. keep the length of the line between the out pin and the switching device as short as possible to provide a clean switching waveform to the switching device. 4. use longer lines for the low-impedance side of the output voltage detection resistors. osc 17 out1 12 v in v out r t c t gnd common impedance osc 17 out1 12 v in v out r t c t gnd (1) use separate lines. (2) modify the values of the capacitor and resistor. q1 lower limit voltage of the sawtooth wave during stable operation small large the frequency changes at each period. noise is picked up and the ic switches from charge to discharge operation. q1
AN8049SH voltage regulators 26 n application notes (continued) [11] differences between this ic and the an8049fhn the pin arrangements differ. the an8049fhn is a alternative package version of this ic. ctl1 off v ref rb2 rb1 out1 ctl2 ctl3 dt1 dt2 dt3 s.c.p. 6 5 4 3 2 1 in + 3 osc v cc out3 gnd out2 18 19 20 21 22 23 24 in - 3 fb3 in - 2 fb2 in - 1 fb1 7 8 9 10 11 12 17 16 15 14 13 in - 2 fb3 in - 3 in + 3 osc v cc out3 19 18 17 16 15 14 13 dt2 1 2 3 4 5 6 7 dt1 ctl3 ctl2 ctl1 off v ref 12 11 10 rb1 out1 out2 gnd 9 rb2 8 fb2 in - 1 20 21 fb1 22 s.c.p. 23 dt3 24 AN8049SH an8049fhn
voltage regulators AN8049SH 27 n application notes (continued) [12] error amplifier frequency characteristics 1. error amplifiers 1 and 2 (test circuit) 180 135 45 0 90 - 45 phase ( ) frequency (hz) 100m 100k 1m 10m 10k 1k 40 30 10 - 10 20 0 - 20 gain (db) amp.1 v ref 1.26 v 100 k w 100 k w 1 k w 10 m f fb1 v out 2.3 v v in 4 mv[ p-p ] in - 1 2. error amplifier 3 (test circuit) 0 - 45 - 135 - 180 - 90 - 225 phase ( ) frequency (hz) 100m 100k 1m 10m 10k 1k 40 30 10 - 10 20 0 - 20 gain (db) amp.3 1 k w 100 k w 1 k w 1 k w 10 m f 10 m f fb3 v out 1 v v in 4 mv[ p-p ] in - 3 in + 3
AN8049SH voltage regulators 28 n application circuit example in - 3 fb3 in - 2 fb2 in - 1 fb1 in + 3 osc v cc out3 gnd input out2 18 17 16 15 14 13 ctl2 ctl3 dt1 dt2 dt3 s.c.p. 6 7 8 9 10 11 12 ctl1 off v ref rb2 rb1 out1 step-down v out1 3.3 v 300 ma step-up v out2 13.3 v 300 ma inverting v out3 - 15 v 10 ma v ref q1 q2 q3 19 20 21 22 23 24 5 4 3 2 1 10 k w 10 k w 2.2 k w 150 k w 125.1 k w 13 k w 12 k w 14 k w 23 k w 100 pf 0.033 m f 10 m f 10 m f 10 m f 10 m f 100 pf 100 w 1 k w 7.5 k w 9.1 k w 1 k w on/off 0.12 m f 0.12 m f 0.12 m f 0.12 m f 0.01 m f 0.01 m f 0.01 m f 0.12 m f 470 pf 1 m w 1 m w

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